Eindhoven, The Netherlands --
Experts from Philips and The Pennsylvania State University have
jointly developed an advanced MOSFET (metal-oxide semiconductor
field effect transistor) model based on the accurate calculation and
extensive use of the surface potential. This is regarded as the best
possible approximation of the physical behavior of transistors and
yields better predictions of the performance of integrated circuits
than is possible with alternative model formulations, especially
when devices are scaled down in successive technology generations,
or are strained to their operating limits such as in high-frequency
applications. The model has been submitted to the Compact Model
Council (CMC) as a candidate for standardization.
Compact models describe the behavior of transistors in a
mathematical way and form the basis of circuit simulators. Circuit
simulators are used by IC designers to verify the behavior of their
designs before the time consuming and costly fabrication process is
started. This enables shorter design cycles, and means that even
designs for large (100 million transistors) system-on-chip ICs are
right the first time. Standardization in the use and implementation
of transistor models is promoted by the CMC in order to facilitate
the exchange of circuit designs and the outsourcing of chip
fabrication to foundries. The CMC was formed in 1996 and consists of
27 leading semiconductor companies and circuit simulator suppliers.
CMC will select a successor to the currently used standard compact
model for complementary metal-oxide semiconductor (CMOS) transistors
during the course of this year.
The compact model developed by Philips Research and The Pennsylvania
State University is based on fundamental physics (the surface
potential approach) over the entire operating regime, whereas the
existing CMC-standard models are based on a simplified description
of two limiting regimes (sub-threshold and strong inversion) and use
mathematical, not physical, techniques to approximate the behavior
between these regimes. The new model is called PSP and builds on the
Philips MOS Model 11 and the Penn State SP model.
PSP accounts for all relevant effects by including the underlying
device physics. Hence the number of fitting parameters is
significantly reduced relative to the existing standard models. For
example, gate leakage, noise and quantum-mechanical effects, which
become increasingly important with the downscaling of CMOS
technology, are physically modeled and extensively verified
experimentally. The model also provides a better description of
high-frequency behavior, which is important in the design of RF CMOS
circuits, a market which is rapidly gaining importance, for example
in wireless connectivity applications.
The significant increase in the capabilities of the joint model,
without a simultaneous increase in model complexity, was
accomplished by Penn State and Philips researchers solving several
long-standing theoretical problems of compact modeling, like
efficient incorporation of gate current, gate-induced noise and
non-quasi-static effects. From the practical point of view, the new
model enables accurate and efficient simulation of a wide class of
circuits (e.g. passive mixers or current ratio-based circuits) that
are important in mobile communication technology and other advanced
designs yet cannot be simulated properly with existing standard CMC
models.
"We believe our model significantly advances the state of the art in
compact modeling," said Gennady Gildenblat, Professor of Electrical
Engineering at The Pennsylvania State University. "This cooperation
enables wide industrial applications of our fundamental academic
research. It has been verified against measurements on transistors
from various industrial parties, made with the latest CMOS
technology down to 65-nm generations. The new PSP model accurately
predicts the transistor behavior up to frequencies well above 50
GHz."
"Our cooperation brings together the best fundamental academic and
pragmatic industrial knowledge and expertise on compact modeling,"
said Dr Dirk Klaassen, Research Fellow at Philips Research. "It
directly ties our combined deep understanding of the physical
behavior of MOS transistors onto the requirements set by IC
designers and the application areas most relevant to them. During
the process of model development we have emphasized the requirement
of introducing as few variables as possible in order to achieve fast
and accurate circuit simulations."
Following a more than decade-old practice of Open Innovation in this
field by Philips, all details of the new model will be available on
the Internet and can be freely used in order to facilitate
communication between IC designers and manufacturers and to help the
promotion and development of international standards. The compact
model is supported by a professional software environment, SiMKit,
which allows it to be directly coupled to many popular circuit
simulators.
The development of the PSP model at The Pennsylvania State
University was supported in part by SRC, Freescale Semiconductor,
LSI Logic and IBM. The development at Philips Research was supported
by the EU projects IMPACT and NanoCMOS.
Measurement setup for high-frequency characterization of
transistors up to 110 GHz
Ellen de Vries
Philips Research
Tel.: +31 40 27 42321
Mobile: +31 6 53243037
Email: ellen.de.vries@philips.com
Gennady Gildenblat
Department of Electrical Engineering
The Pennsylvania State University
University Park, PA 16802
Tel. 814.867.0206
E-mail: Gildenblat@psu.edu
About Royal Philips Electronics
Royal Philips Electronics of the Netherlands (NYSE: PHG, AEX: PHI) is a
global leader in healthcare, lighting and consumer lifestyle, delivering
people-centric, innovative products, services and solutions through the brand
promise of “sense and simplicity”. Headquartered in the Netherlands, Philips
employs approximately 134,200 employees in more than 60 countries worldwide.
With sales of EUR 27 billion in 2007, the company is a market leader in medical
diagnostic imaging and patient monitoring systems, energy efficient lighting
solutions, as well as lifestyle solutions for personal wellbeing. News from Philips is located at
www.philips.com/newscenter.
About The Pennsylvania State University
Penn State is
one of the largest land grant universities in the US with over
80,000 students. About 40,000 are at the University Park
Campus, including over 10,000 graduate students, with the
remainder at 22 locations across Pennsylvania. The Department
of Electrical Engineering is among the largest and most
innovative in the nation and serves primarily upper-division
and graduate students. It currently has over 45 faculty, 650
junior- and senior-level students, and 250 graduate students.
Sponsored research is being conducted in many areas, including
electronic materials and devices, electrodynamics, space
sciences, remote sensing, electro-optics, signal and image
processing, power systems and power electronics,
communications and networking, and decision and control.