Eindhoven, The Netherlands - Philips
and the Pennsylvania State University today announced that their
jointly developed PSP (Penn State Philips) complementary metal-oxide
semiconductor (CMOS) transistor model has been selected by the
Compact Model Council (CMC) as the industry-wide standard for future
CMOS chip design. Founded in 1996 and comprised of 31 leading
semiconductor companies and circuit simulator suppliers, the CMC is
the world’s foremost authority for the standardization,
implementation and use of transistor models.
The PSP model will now become the industry standard for simulating
the behavior of future generations of CMOS transistors produced at
the 65-nm technology node and beyond. By allowing designers to
accurately predict circuit performance before committing their
designs to silicon, this new standard will enable the optimal use of
CMOS chip technology in real-world applications. In addition, the
standard will facilitate the exchange of chip designs between design
groups and the outsourcing of chip fabrication to silicon foundries
by allowing everyone to communicate using the same transistor
modeling language. As a result, the chips produced will perform
better, be less expensive and appear earlier on the market.
“As CMOS takes on new roles beyond the production of purely digital
chips, it is important that the industry has a single model that
accurately predicts transistor performance under all circuit
conditions, including RF and analog circuit behavior,” said Dr.
Reinout Woltjer, Department Head of the Device Modeling group at
Philips Research. “By basing the PSP model on the fundamental
physics of transistor operation, it provides extremely accurate
results over the entire operating spectrum from DC to well in excess
of 50 GHz.”
“The PSP model incorporates a number of recent advances in MOS
device physics and was made possible by the innovative but practical
solution of several long-standing theoretical problems of compact
MOSFET modeling” said Dr. Gennady Gildenblat, Professor of
Electrical Engineering at The Pennsylvania State University. “This
made it possible to include all relevant physical effects without
significantly increasing model complexity – a prerequisite for
scalability of the model to ever-smaller device geometries.”
Because it is based on the underlying physics of CMOS transistor
operation, the number of parameters needed in the PSP model is
significantly less than that required by other models. This not only
means that the PSP model enables faster circuit simulation. It also
means that the simulation results obtained are more accurate. In
particular, it accurately models gate leakage, noise and
quantum-mechanical effects that will become increasingly significant
to circuit performance as CMOS processes are scaled to nanometer
proportions. To allow rapid integration into EDA tools, the model is
supported by SiMKit – a professional grade software environment that
allows it to be directly coupled into popular circuit simulators.
Measurement setup for high-frequency characterization of
transistors up to 110 GHz
Steve Klink
Communications Department Philips Research
Tel.: +31 40 27 43703
Mobile: +31 6 10888824
E-mail: steve.klink@philips.com
Gennady Gildenblat
Department of Electrical Engineering
The Pennsylvania State University
University Park, PA 16802
Tel. 814.865.0519
E-mail: Gildenblat@psu.edu
About Royal Philips Electronics
Royal Philips Electronics of the Netherlands (NYSE: PHG, AEX: PHI) is a
global leader in healthcare, lighting and consumer lifestyle, delivering
people-centric, innovative products, services and solutions through the brand
promise of “sense and simplicity”. Headquartered in the Netherlands, Philips
employs approximately 134,200 employees in more than 60 countries worldwide.
With sales of EUR 27 billion in 2007, the company is a market leader in medical
diagnostic imaging and patient monitoring systems, energy efficient lighting
solutions, as well as lifestyle solutions for personal wellbeing. News from Philips is located at
www.philips.com/newscenter.
About The Pennsylvania State University
Penn State is one of the largest land grant universities in the US
with over 80,000 students. About 40,000 are at the University Park
Campus, including over 10,000 graduate students, with the remainder
at 22 locations across Pennsylvania. The Department of Electrical
Engineering is among the largest and most innovative in the nation
and serves primarily upper-division and graduate students. It
currently has over 45 faculty, 650 junior- and senior-level
students, and 250 graduate students. Sponsored research is being
conducted in many areas, including electronic materials and devices,
electrodynamics, space sciences, remote sensing, electro-optics,
signal and image processing, power systems and power electronics,
communications and networking, and decision and control.